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| AMMC-6232 8 to 32 GHz GaAs High Linearity Low Noise Amplifier Data Sheet Description Avago Technologies AMMC-6232 is an easy-to-use broadband, high gain, high linearity Low Noise Amplifier that operates from 18 GHz to 32GHz. The wide band and unconditionally stable performance makes this MMIC ideal as a primary or sub-sequential low noise block or a transmitter or LO driver. The MMIC has 4 gain stages and requires a 4V, 135mA power supply for optimal performance. The two gate bias voltages can be combined for ease of use or separated for more control flexibility. DCblock capacitors are integrated at the input and output stages. Since this MMIC covers several bands, it can reduce part inventory and increase volume purchase options The MMIC is fabricated using PHEMT technology to provide exceptional low noise, gain and power performance. The backside of the chip is both RF and DC ground which helps simplify the assembly process and reduce assembly related performance variations and cost. Features * 800m x 2000m Die Size * Single Positive Bias Supply * Unconditionally Stable Specifications (Vdd = 4.0V, Idd = 135mA) * * * * * * * * * RF Frequencies: 18 - 32 GHz High Output IP3: 29dBm High Small-Signal Gain: 27dB Typical Noise Figure: 2.8dB Input, Output Match: -10dB Applications Microwave Radio systems Satellite VSAT, DBS Up/Down Link LMDS & Pt-Pt mmW Long Haul Broadband Wireless Access (including 802.16 and 802.20 WiMax) * WLL and MMDS loops * Commercial grade military Note: 1. This MMIC uses depletion mode pHEMT devices. Chip Size: 800 m x 2000m (31.5 x 78.74 mils) Chip Size Tolerance: 10 m (0.4 mils) Chip Thickness: 100 10 m (4 0.4 mils) Pad Dimensions: 100 x 100 m (4 x 4 mils) Attention: Observe precautions for handling electrostatic sensitive devices. ESD Machine Model (Class A) ESD Human Body Model (Class 1A) Refer to Avago Application Note A004R: Electrostatic Discharge Damage and Control Absolute Maximum Ratings (1) Parameters / Conditions Drain to Ground Voltage Gate-Drain Voltage Drain Current Gate Bias Voltage Gate Bias Current RF CW Input Power Max Max channel temperature Storage temperature Maximum Assembly Temp Symbol Vdd Vgd Idd Vg Ig Pin Tch stg Tmax Unit V V mA V mA dBm C C C Max 5.5 -8 200 +0.8 5 +50 -65 +50 260 for 20s (1) Operation in excess of any of these conditions may result in permanent damage to this device. The absolute maximum ratings for Vdd, Vgd, Idd Vg, Ig and Pin were determined at an ambient temperature of 25C unless noted otherwise. DC Specifications/ Physical Properties (2) Parameter and Test Condition Drain Supply Current (Vd=4.0 V) Drain Supply Voltage Gate Bias Current Gate Bias Voltage Thermal Resistance(3) Symbol Idd Vd Ig Vg jc Unit mA V mA V C/W -.3 3 Min Typ 35 4 0. -0.95 35. -0.55 Max 50 5 (2) Ambient operational temperature TA=25C unless noted (3) Channel-to-backside Thermal Resistance (Tchannel = 34C) as measured using infrared microscopy. Thermal Resistance at backside temp. (Tb) = 25C calculated from measured data. AMMC-6232 RF Specifications (4) TA= 25C, Vdd = 4.0 V, Idd = 135mA, Zo=50 Parameters and Test Conditions Small signal gain (4) Symbol AGain Unit dB Frequency (GHz) 20 26 3 Noise Figure into 50W (4) Spec Min 23 23 23 Typ 32 26.7 24.6 3.2 3.3 4 5 26 26 26 20 28 28 27 -50 -0 -0 4.5 4.5 4.5 Max NF dB 20 26 3 Output Power at dB Gain Compression (4) Output Third Order Intercept Point (4) PdB OIP3 dBm dBm 20, 26, 3 20 26 3 Isolation Input Return Loss Output Return Loss S2 S S22 dB dB dB 20, 26, 3 20, 26, 3 20, 26, 3 (4) All tested parameters guaranteed with measurement accuracy 5dBm for OPI3 and 2dB for gain, NF and P1dB. 2 AMMC-6232 Typical Performance[1] (TA = 25C, Vdd=4V, Idd=135mA, Zin = Zout = 50 , on-wafer unless noted) 40 30 20 10 0 15 20 25 30 35 Frequency (GHz) NoiseFigure (dB) 5 4 3 2 1 0 18 20 22 24 26 28 30 32 Frequency (GHz) Figure 1. Small-signal Gain 0 S21 (dB) Figure 2. Noise Figure 20 OP1dB (dBm) S11 (dB) -10 15 -20 10 -30 15 20 25 30 35 Frequency (GHz) 5 18 20 22 24 26 28 30 32 Frequency (GHz) Figure 3. Input Return Loss Figure 4. Output P-1dB 0 OIP3 (dBm) 40 30 20 10 0 -5 S22 (dB) -10 -15 -20 15 20 25 30 Frequency (GHz) 35 18 20 22 24 26 28 30 32 Frequency (GHz) Figure 5. Output Return Loss Note [1] Noise Figure is measured with a 3-dB pad at the input Figure 6. Output IP3 3 AMMC-6232 Typical Performance (Cont) (TA = 25C, Vdd=4V, Idd=135mA, Zin = Zout = 50 , on-wafer unless noted) -20 -30 200 170 Idd (mA) 140 110 80 50 15 20 25 30 35 S12 (dB) -40 -50 -60 -70 Frequency (GHz) 3 3.5 4 Vdd (V) 4.5 5 Figure 7. Isolation 40 30 S21 (dB) 20 4V 10 0 15 20 25 30 35 Frequency (GHz) 5V 3V Figure 8. Idd Over Vdd (same Vg) 5 NoiseFigure (dB) 4 3 2 1 0 18 20 22 24 26 28 30 32 Frequency (GHz) 3V 4V 5V Figure 9. Small-signal Gain Over Vdd Figure 10. Noise Figure Over Vdd 0 -10 -20 -30 15 20 25 30 35 Frequency (GHz) 4V 3V 5V 0 -10 -20 -30 15 4V 5V 3V S11 (dB) S22 (dB) 20 25 30 35 Frequency (GHz) Figure 12. Output Returrn Loss Over Vdd Figure 11. Input Return Loss Over Vdd 4 AMMC-6232 Typical Performance (Cont) (TA = 25C, Vdd=4V, Idd=135mA, Zin = Zout = 50 , on-wafer unless noted) 25 OP1dB (dBm) 40 OIP3 (dBm) 30 20 10 0 32 3V 4V 5V 20 15 3V 10 5 18 20 22 24 26 28 4V 5V 30 18 20 22 24 26 28 30 32 Frequency (GHz) Frequency (GHz) Figure 14. Output IP3 Over Vdd Figure 13. Output P1dB Over Vdd 40 5 NoiseFigure (dB) 4 3 2 1 0 35 30 S21 (dB) 20 25C -45C 25C 85C 10 0 15 20 25 30 Frequency (GHz) 85C -40C 18 20 22 24 26 28 30 32 Frequency (GHz) Figure 16. Noise Figure Over Temperature 0 -10 -20 -30 25C 85C -40C Figure 15. Small-signal Gain Over Temperature 0 -20 25C -40C 85C -30 15 S22 (dB) S11 (dB) -10 20 25 30 Frequency (GHz) 35 15 20 25 30 Frequency (GHz) 35 Figure 17. Output P-1dB Over Vdd Figure 18. Output IP3 Over Vdd 5 AMMC-6232 Typical S-parameters (TA = 25C, Vdd=4V, Idd=135mA, Zin = Zout = 50 unless noted) S11 Freq Mag dB Phase .0 0.88 -.746 -60.02 3.0 0.804 -.897 -6.72 5.0 0.887 -.039 -56.457 7.0 0.899 -0.929 73.389 9.0 0.886 -.052 46.339 .0 0.777 -2.88 2.35 3.0 0.735 -2.669 90.767 4.0 0.678 -3.38 7.345 5.0 0.638 -3.905 50.092 6.0 0.63 -4.256 22.797 7.0 0.660 -3.62 -7.99 8.0 0.529 -5.528 -78.705 8.5 0.406 -7.827 -02.424 9.0 0.354 -9.008 -9.585 9.5 0.32 -0.9 -33.759 20.0 0.290 -0.76 -5.887 20.5 0.283 -0.954 -75.38 2.0 0.268 -.450 6.839 2.5 0.232 -2.699 47.24 22.0 0.96 -4.74 20.747 22.5 0.42 -6.979 98.8 23.0 0.8 -8.530 74.852 23.5 0.094 -20.582 50.063 24.0 0.070 -23.065 33.29 24.5 0.082 -2.723 -23.65 25.0 0.086 -2.283 -48.577 25.5 0.086 -2.326 -6.47 26.0 0.086 -2.335 -72.999 26.5 0.00 -20.009 -85.033 27.0 0.2 -8.335 -90.393 27.5 0.40 -7.079 -92.085 28.0 0.47 -6.67 -93.567 28.5 0.68 -5.504 -04.424 29.0 0.84 -4.70 -06.694 29.5 0.206 -3.734 -2.920 30.0 0.27 -3.275 -4.467 30.5 0.222 -3.092 -5.644 3.0 0.22 -3.457 -2.023 3.5 0.225 -2.964 -28.559 32.0 0.246 -2.7 -30.429 33.0 0.289 -0.784 -29.264 34.0 0.267 -.479 -49.99 35.0 0.276 -.75 -54.786 36.0 0.23 -2.724 -62.3 37.0 0.25 -3.355 -79.755 38.0 0.28 -3.27 -79.34 39.0 0.62 -5.796 50.36 40.0 0.88 -4.505 0.424 4.0 0.33 -9.592 20.449 42.0 0.67 -3.47 -34.435 43.0 0.822 -.70 -80.398 44.0 0.744 -2.570 -02.406 45.0 0.745 -2.557 -20.374 46.0 0.756 -2.425 -28.8 47.0 0.698 -3.25 -38.988 48.0 0.76 -2.899 -45.786 49.0 0.75 -2.96 -5.057 50.0 0.748 -2.57 -63.929 Note: S-parameters are measured on wafer. 6 Mag 0.025 0.04 0.002 0.00 0.06 0.93 0.66 .397 3.60 7.829 2.30 40.832 4.585 40.952 4.088 4.954 42.834 42.840 4.949 40.5 37.945 35.378 32.869 30.64 29.75 27.93 26.734 25.44 24.006 22.974 2.829 2.205 20.735 20.656 20.76 20.43 20.688 20.734 20.62 20.304 9.283 6.963 4.380 .28 8.435 6.8 4.695 3.67 2.964 .992 0.906 0.350 0.46 0.042 0.039 0.08 0.02 0.020 S21 dB -3.992 -36.892 -52.654 -6.276 -35.97 -4.294 -3.593 2.907 9.993 7.874 26.572 32.220 32.379 32.246 32.274 32.455 32.636 32.637 32.455 32.074 3.583 30.975 30.336 29.726 29.300 28.96 28.54 28. 27.607 27.225 26.78 26.529 26.334 26.30 26.345 26.206 26.34 26.334 26.282 26.52 25.703 24.590 23.55 20.999 8.522 5.82 3.433 .297 9.438 5.985 -0.862 -9.8 -6.688 -27.587 -28.36 -34.90 -38.392 -33.979 Phase -73.734 -07.504 65.254 78.332 -29.907 -3.45 -06.340 -46.77 73.45 27.42 66.397 -25.727 -68.344 -03.547 -34.623 -63.735 66.906 36.860 08.907 80.907 55.254 30.342 7.46 -4.52 -35.29 -55.74 -76.327 -96.844 -6.383 -35.333 -53.56 -7.26 70.769 52.609 33.333 4.454 94.83 73.377 52.636 3.050 -3.920 -60.335 -06.453 -53.267 6.897 20.672 80.964 39.388 -9.43 -70.226 -24.255 -64.509 62.943 42.437 39.233 3.635 -29.632 3.9 Mag 0.003 0.002 0.002 0.002 0.00 0.00 0.002 0.004 0.003 0.003 0.004 0.002 0.00 0.002 0.004 0.003 0.003 0.004 0.003 0.004 0.003 0.003 0.002 0.006 0.003 0.003 0.002 0.002 0.000 0.002 0.002 0.003 0.006 0.003 0.002 0.002 0.003 0.003 0.003 0.00 0.007 0.006 0.003 0.003 0.003 0.006 0.006 0.004 0.007 0.005 0.004 0.02 0.09 0.04 0.008 0.03 0.029 0.05 S12 dB -49.34 -54.203 -52.786 -52.30 -64.067 -58.094 -55.057 -49.054 -5.286 -50.242 -48.669 -54.54 -56.637 -53.933 -48.533 -50.000 -5.75 -47.869 -50.079 -49.044 -5.053 -5.240 -53.496 -44.954 -5.886 -50.720 -55.542 -53.22 -70.458 -52.072 -53.736 -5.674 -44.656 -50.322 -55.78 -55.378 -5.486 -5.34 -5.287 -59.538 -42.943 -44.688 -49.25 -50.088 -50.724 -44.52 -44.523 -47.382 -43.734 -45.667 -48.650 -38.07 -34.57 -36.790 -4.590 -37.64 -30.658 -25.798 Phase 72.088 -70.740 69.502 89.767 -46.750 -30.428 4.432 -3.664 2.903 -7.45 32.09 -50.466 -23.683 25.705 -99.868 -84.52 0.027 -35.577 4.804 -66.647 -43.775 -54.94 -70.42 25.867 59.279 -7.666 -74.29 29.72 -6.235 96.583 75.096 -50.054 -42.304 -50.809 -9.759 -42.825 97.286 6.486 -43.352 47.465 -40.352 37.600 29.465 -5.073 -89.54 -3.404 0.595 -75.209 -7.567 45.83 77.675 -38.925 -30.836 -6.379 4.635 -68.54 48.528 -6.722 Mag 0.954 0.590 0.836 0.784 0.743 0.743 0.66 0.609 0.547 0.496 0.448 0.385 0.384 0.365 0.359 0.332 0.32 0.295 0.39 0.305 0.286 0.268 0.279 0.258 0.283 0.274 0.267 0.252 0.243 0.25 0.90 0.80 0.69 0.64 0.34 0.095 0.097 0.093 0.077 0.22 0.227 0.288 0.389 0.44 0.502 0.547 0.582 0.664 0.660 0.722 0.735 0.768 0.822 0.778 0.870 0.840 0.856 0.927 S22 dB -0.405 -4.586 -.555 -2.3 -2.583 -2.575 -3.600 -4.32 -5.24 -6.087 -6.966 -8.28 -8.305 -8.753 -8.899 -9.567 -9.865 -0.589 -9.93 -0.307 -0.877 -.448 -.087 -.772 -0.968 -.23 -.484 -.956 -2.272 -3.349 -4.435 -4.90 -5.457 -5.678 -7.439 -20.40 -20.267 -20.67 -22.279 -8.257 -2.866 -0.820 -8.94 -7.655 -5.992 -5.242 -4.699 -3.554 -3.604 -2.826 -2.670 -2.293 -.706 -2.86 -.206 -.54 -.353 -0.657 Phase -72.004 -35.849 -7.399 57.037 36.088 0. 78.986 62.630 47.093 28.48 .74 -4.47 -2.762 -22.50 -30.282 -38.594 -53.085 -58.66 -73.699 -75. -83.302 -92.687 -0.88 -03.724 -09.636 -20.74 -34.054 -4.622 -47.702 -5.808 -57.448 -69.765 -74.76 79.624 69.927 56.964 5.370 90.295 45.62 4.86 -23.228 -45.95 -60.88 -7.849 -87.40 -93.97 -05.709 -.896 -20.779 -28.58 -32.437 -43.230 -44.474 -54.332 -60.348 -6.626 -70.390 -7.490 AMMC-6232 Application and Usage To VDD DC supply 0.1 uF Capacitor Biasing and Operation The AMMC-6232 is normally biased with a positive drain supply connected to the VD1 and VD2 pads through bypass capacitor as shown in Figures 15 and 16. The recommended drain voltage and gate voltage for general usage is 4V and -0.95V respectively. With Vdd=4V, Vg=0.95V, the corresponding drain current is approximately 135mA. It is important to have at least 0.1upF bypass capacitor and the capacitor should be placed as close to the component as possible. Aspects of the amplifier performance may be improved over a narrower bandwidth by application of additional conjugate, linearity, or low noise (Topt) matching. After adjusting the gate bias to obtain 135mA at Vdd = 4V, the AMMC-6232 can be safely biased at Vdd= 3V or 5V (while fixing the gate bias) as desired. At 4V, the performance is an optimal compromise between power consumption, gain and power/linearity. It is both applicable to be used as a low noise block or driver. At 3V, the amplifier is ideal as a front end low noise block where linearity is not highly required. At 5V, the amplifier can provide ~ 2dB more output power for LO or transmitter driver applications where high output power and linearity are often required. RF OUTPUT VD1 VD2 RF OUTPUT RF INPUT AMMC-6232 To VGate DC supply Figure 19. Gate Bias Combined Together To VDD DC supply 0.1 uF Capacitor VD1 VD2 RF INPUT AMMC-6232 The two gate voltages can be combined as shown in Figure 15 or separated as in Figure 16. Combining the two gate voltages simplifies the usage whereas separating them provides flexibility to overall biasing scheme. In both cases, bonding wires at the input and output in the range of 0.15nH would likely improve the overall Noise Figure and input, output match at most frequencies. No ground wires are needed because ground connection is made with plated through-holes to the backside of the substrate. Refer the Absolute Maximum Ratings table for allowed DC and thermal condition Gold Plated Shim (Optional) To VG1 DC supply To VG2 DC supply Figure 20. Separated Gate Bias Figure 21. Simplified High Linearity LNA Schematic 7 Assembly Techniques The backside of the MMIC chip is RF ground. For microstrip applications the chip should be attached directly to the ground plane (e.g. circuit carrier or heatsink) using electrically conductive epoxy [1] For best performance, the topside of the MMIC should be brought up to the same height as the circuit surrounding it. This can be accomplished by mounting a gold plated metal shim (same length as the MMIC) under the chip which is of correct thickness to make the chip and adjacent circuit the same height. The amount of epoxy used for the chip or shim attachment should be just enough to provide a thin fillet around the bottom perimeter of the chip. The ground plane should be free of any residue that may jeopardize electrical or mechanical attachment. RF connections should be kept as short as reasonable to minimize performance degradation due to undesirable series inductance. A single bond wire is normally sufficient for signal connections, however double bonding with 0.7mil gold wire will reduce series inductance. Gold thermo-sonic wedge bonding is the preferred method for wire attachment to the bond pads. The recommended wire bond stage temperature is 150c 2c. VD1 800 0 725 875 1370 Caution should be taken to not exceed the Absolute Maximum Rating for assembly temperature and time. The chip is 100um thick and should be handled with care. This MMIC has exposed air bridges on the top surface and should be handled by the edges or with a custom collet (do not pick up the die with a vacuum on die center). Bonding pads and chip backside metallization are gold. This MMIC is also static sensitive and ESD precautions should be taken For more detailed information see Avago Technolgies' application note #54 "GaAs MMIC assembly and handling guidelines" Notes: [1] Ablebond 84-1 LMI silver epoxy is recommended Ordering Information: AMMC-6232-W10 = 10 devices per tray AMMC-6232-W50 = 50 devices per tray VD2 1510 2000 800 650 410 RFin 275 425 RFout 290 0 0 540 130 VG1 660 1470 VG2 1600 0 Figure 22. Bond Pad Locations For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Limited in the United States and other countries. Data subject to change. Copyright (c) 2006 Avago Technologies Limited. All rights reserved. AV0-0440EN - November 29, 2006 |
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